Definition of Gateware

Definition of Gateware

This tutorial describes the definition of gateware:


Gateware comprises the description (of behaviour, structure and/or connections) of digital logic gates, a high level abstraction thereof, and/or the implementation thereof in (re)configurable logic devices (such as FPGAs and ASICs).


Understanding the definition and realm of gateware is important to be able to understand and take advantage of the many languages and tools available for FPGA/ASIC application design. This tutorial provides the definition of gateware, and points out the overlap and/or boundaries between gateware, hardware and software.

Gateware vs. Firmware

FPGAs have become increasingly more powerful and complex, often integrating hard CPU cores into the silicon. A CPU or microcontroller (uC) could also exist as a module or IC on the FPGAs circuit board, as a soft core in FPGA fabric, or as a hard core on the same FPGA die. In addition, high performance FPGAs are often accompanied by external CPUs and/or

supporting uCs. All these CPUs and uCs run software or a subclass thereof: firmware.

The term firmware is often wrongly used to indicate HDL code, programming files for FPGAs, or an HDL implementation running in an FPGA (all gateware). The aim here is not to disambiguate the often misused term firmware, but rather to point out that gateware does not belong to the realm of firmware and vice versa. The definition of gateware is compact and has clear boundaries, as it is tied to (re)configurable logic gates. Even with the gateware realm taken out of the possible scope of firmware, the term firmware remains vague and poorly defined. The most accurate definition of firmware is given below:


Firmware is a subclass of software.


As such, this tutorial will not explicitly mention firmware in the following chapters, but rather use the term software which also includes firmware.

Types of gateware

This chapter describes the types of gateware as compared in Table 1, and depicted in Figure 1.

Gateware is used to produce application specific digital hardware (integrated digital circuits, ASIC), or to set up a reconfigurable digital device (FPGA, PLD) for a specific application.

In the first case, the gateware becomes hardware. In the latter case, the gateware is run on hardware.


An application running in FPGA fabric is gateware. An application could also run on a hardware or gateware cpu, in which case it is software.

The bitstream carrying the configuration of the logic gates is gateware. However, the bitstream might also contain program code for a CPU - which is software. The CPU might be implemented in FPGA fabric, in which case it is gateware. Otherwise the CPU is hardware.


HDL code and HLS code are gateware. C code is software, unless it is HLS C code, in which case it is gateware.


OpenCL targets a variety of hardware for heterogeneous computing. Therefore it can be software or gateware. The host code however is always software. The kernel code can be software, e.g. when targeting a GPU, or gateware e.g. when targeting an FPGA.

All gateware code can be turned into hardware (ASIC), including OpenCL kernels.

Figure 1 - Gateware compared to software and hardware

Conclusion

Terminology at high level ripples down to implementation level, and vice versa. Using the correct definition of gateware is key to clear communication in FPGA or ASIC based projects.